The Ceiling You Paid For: How Legacy Memory Boundaries Still Carve Up Your 128 GB
Photo: ITEagle Europe - Sebastiaan Broekhoven, CC BY-SA 4.0, via Wikimedia Commons
Ask any American PC enthusiast over forty about memory limits and you will get the same punchline: 640 KB ought to be enough for anybody. The quote is likely apocryphal, but the barrier it mocks was real, and it taught the industry a lesson it has never fully unlearned — that memory maps, once published, become permanent.
The 640 KB limit itself died with DOS-era segmented addressing. What survived is the pattern: drawing a hard line at a power of two, shipping hardware around it, and leaving future generations to route traffic around a boundary nobody can remove. Your 128 GB workstation still obeys several of these lines. You just cannot see them.
The 4 GB Hole That Ate Your RAM
The most familiar survivor is the memory-mapped I/O (MMIO) window near the top of 32-bit address space. When the PCI bus was standardized, designers needed addresses for device firmware, option ROMs, and memory-mapped registers. They placed these just below the 4 GB boundary — a tidy choice when 4 GB of RAM was a datacenter fantasy.
It stopped being tidy when 4 GB of DRAM became affordable around 2007. Devices like the NVIDIA GeForce 8800 series shipped with MMIO regions carving hundreds of megabytes out of the top of physical address space, and any RAM mapped into the same region simply vanished from a 32-bit OS. "Where did my 4 GB go?" was a support forum staple for years.
The fix was 64-bit addressing plus PAE remapping: the firmware relocates those device windows above 4 GB, and the lost memory returns. But the hole itself never left. Open any modern board's memory map and you will find it, larger than ever. A system with a big discrete GPU and a resizable-BAR-capable chipset can reserve 32 GB or more of address space for MMIO — not because the devices need it today, but because the reservation must be future-proof and, crucially, must never move again.
Why the Boundaries Cannot Move
The obvious question: why not just relocate these windows? The answer is that the memory map is not one document. It is a contract negotiated among firmware, silicon, operating systems, drivers, and — in enterprise settings — hypervisors, and every party has memorized a different copy.
Consider what breaks if the MMIO hole shifts. Windows' memory manager and its kernel patching assumptions were tuned against documented layouts. Linux distributions have shipped with hardcoded assumptions in early boot code. Some add-in cards carry option ROMs that hard-fail if their decode window lands outside expected ranges. Server platforms add SMM handler regions and TSEG, which firmware locks at boot and which no operating system can renegotiate. Moving a boundary is not a patch; it is a coordinated firmware and OS release across an ecosystem of vendors with no shared schedule.
There is also the ghost of compatibility itself. The PC platform's greatest commercial asset has always been backward compatibility, and every memory map since 1981 has been designed to contain its predecessor rather than replace it. The 640 KB line was subsumed, not deleted. So too the 4 GB line.
The Invisible Ceilings Above 4 GB
Modern platforms have inherited more than one boundary. Above the MMIO hole sits a second reservation region, typically 64 GB in size on contemporary Intel and AMD desktop chipsets, reserved for large BAR assignments — GPU framebuffers, NVMe controllers, accelerator cards. On a 64 GB machine, this is academic. On a 128 GB workstation stuffed with compute accelerators, it defines how devices can even be addressed.
Firmware reserves further slices you will never reclaim: SMM memory, TPM and ACPI tables, Trusted Execution Environment regions on systems with Intel TXT or AMD PSP. A typical consumer build quietly cedes tens of megabytes; a server with memory encryption enabled can lose hundreds. Linux users can see the evidence in dmesg, where the kernel reports "BIOS-e820" reservations it agreed to avoid. The e820 interface itself dates to the original IBM BIOS — the map you are reading is a direct descendant of 1981's memory map, extended upward one ceiling at a time.
Living With the Lines
None of this is a scandal. Reservations are documented, small relative to modern capacity, and exist for defensible reasons — security regions in particular should not be negotiable. The instructive part is what they reveal about platform design: address space boundaries behave like zoning law. Once drawn, they attract dependencies, and dependencies make the lines permanent regardless of whether anyone still endorses them.
The 640 KB limit was a mistake corrected within a decade. Its grandchildren — the MMIO hole, the 64 GB BAR window, the e820 reservations — are mistakes nobody made, working exactly as designed, quietly deciding where your hardware may and may not live. The next time a spec sheet advertises support for 192 GB of memory, read the fine print. Somewhere in the firmware, a line is already drawn, and your DIMMs will have to respect it.
